When a cache line is copied from memory into the cache, a cache entry is created. Cache entriesĭata is transferred between memory and cache in blocks of fixed size, called cache lines. The data cache is usually organized as a hierarchy of more cache levels (L1, L2, etc. Most modern desktop and server CPUs have at least three independent caches: an instruction cache to speed up executable instruction fetch, a data cache to speed up data fetch and store, and a translation lookaside buffer (TLB) used to speed up virtual-to-physical address translation for both executable instructions and data. If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to main memory. When the processor needs to read from or write to a location in main memory, it first checks whether a copy of that data is in the cache.
6 Cache hierarchy in a modern processor.
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